Honestly i have never done that and not sure how it works. in this case, you would ask me how to program it, well, if in FPGA you would go something like a more elegant way could be to use an FPGA support chip which is a Hybrid of Analog and Digital (like this PSoC 5 ). One way is to use FPGA's logic in conjunction with analog components.analog components will be attached to the board externally via cable, or sort of that.but imagine how slow your adc would become, anyway it would work, to sample 100 k samples per second and digitize it. so if you are going to create some magic code inside your fpga which will serve as Simultaneous Sampling SAR ADC, i'd say it's impossible. ![]() because inside the second half there is DAC, which is purely analog device (resistor R2/R ladder and Opamp ). second half of SAR converter is mostly analog. although instead of capacitor at input they use a multiplexer and track and hold circuit i have no idea how that works, but maybe it is possible to avoid a capacitor. but input to the converter is analog (to input any signal you need sample and hold circuit, which uses a capacitor and Opamp). one half of SAR converter is mostly digital, since it uses registers. ![]() ![]() You are trying to build Simultaneous Sampling SAR ADC which has integrated DAC looking at datasheet circuit, it looks like fully digital device but in fact its analog/digital hybrid.
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